Can anyone help with Lab 3: Logic Gate Implementation? I know that I need (A or B) and C setup. But I don't know how to do exactly in this diagram; it's confusing me.

https://6002x.mitx.mit.edu/courseware/6.002_Spring_2012/Week_3/Logic_Gate_Implementation/

Question

Can anyone help with Lab 3: Logic Gate Implementation?  I know that I need (A or B) and C setup.  But I don't know how to do exactly in this diagram; it's confusing me.

https://6002x.mitx.mit.edu/courseware/6.002_Spring_2012/Week_3/Logic_Gate_Implementation/

anonymous · Answer

OR means parallel and AND means series.now put your MOSFETs in that manner and wire up the voltage source to G means voltage source A to G of MOSFET A..this will give you the desired output.you can check the figure 6.24 in the text book.