Question

The drain of Q1 is still high and the gate of Q2 is at VOL. A STORE pulse comes in and turns on Q3. How long must the STORE pulse be on, in picoseconds, to charge the gate capacitance of Q2 to VOH?
incorrect
Note: In fact, the SR model is not very accurate for Q3 in this circuit because Q3 is in saturation, but use the SR model anyway, for simplicity.

Now, suppose DIN is high, the drain of Q1 is low, and the gate of Q2 is at VOH. A STORE pulse comes in and turns on Q3. How long must the STORE pulse be on, in picoseconds, to discharge the gate capacitance of Q2 to VIL?

Answer 1

tell me all value.

Answer 2

VS=5.0V, VOH=3.5V, VIH=3.0V, VIL=0.9V, VOL=0.5V

The gate-source capacitance CGS=3.5fF and VT=1.0V.

RON=2150.0Ω, ROFF=95.0MΩ and RPU=18.0kΩ.

Answer 3

tell me H8P3 1,2 and 3 answer

Answer 4

185,347
5
4

Answer 5

62 ps
29.9 ps

Answer 6

if correct please click best response

Answer 7

62 is wrong

Answer 8

56 to 75 ps try

Answer 9

@NURALI CAN U LEMME KNO MY ANSWER
We assume an "ancient" 1μm technology satisfying the static discipline:

VS=5.0V, VOH=3.5V, VIH=3.0V, VIL=0.9V, VOL=0.5V

The gate-source capacitance CGS=3.5fF and VT=1.0V.

RON=2150.0Ω, ROFF=115.0MΩ and RPU=10.0kΩ.

Answer 10

62 and 35

Answer 11

We assume an "ancient" 1μm technology satisfying the static discipline:

VS=5.0V, VOH=3.5V, VIH=3.0V, VIL=0.9V, VOL=0.5V

The gate-source capacitance CGS=3.5fF and VT=1.0V.

RON=2150.0Ω, ROFF=110.0MΩ and RPU=16.0kΩ.