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Is an NMOS transistor, with its gate and drain terminal connected to 5V and its source connected to an uncharged capacitor, have its Vgs and Vds decrease at the same rate (and because of that remain equal) as the capacitor is charged to 5-Vt?
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So here's the two states that my circuit is going to transition through. Notice Vgs and Vds are equal in both instances. Would they remain equal through the transition?
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