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MIT 6.002 Circuits and Electronics, Spring 2007 17 Online
OpenStudy (anonymous):

can an odd parity checker be implemented with 2 xor gates? @Engineering

OpenStudy (anonymous):

How is the bus width? For two bits we need only one XOR gate to implement odd parity checker!

OpenStudy (anonymous):

x y XOR XNOR Odd Even 0 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1

OpenStudy (anonymous):

two data bits and one parity bit

OpenStudy (anonymous):

the table above helps you! You need only one XOR gate! =)

OpenStudy (anonymous):

do you get?

OpenStudy (anonymous):

u r generating the parity bit instead of checking it. incoming signal is having 2 data bits and 1 parity bit. u need xtra ckt to check it

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