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MIT 6.002 Circuits and Electronics, Spring 2007
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can an odd parity checker be implemented with 2 xor gates? @Engineering
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How is the bus width? For two bits we need only one XOR gate to implement odd parity checker!
x y XOR XNOR Odd Even 0 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1
two data bits and one parity bit
the table above helps you! You need only one XOR gate! =)
do you get?
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u r generating the parity bit instead of checking it. incoming signal is having 2 data bits and 1 parity bit. u need xtra ckt to check it
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