VHDL: How do I mask a generic n-bit to the least significant bit?
I already solved it!
x & 0x01
. . . signal zero, one: bit_vector(w-2 downto 0); begin zero <= (others => '0'); one<=(zeros & "1"); . . .
I didnt undertand dmancine. Could you explain in other words? Thx
I don't know VHDL (or even what it is), but that's how you'd do it in most modern programming languages. x is the variable you want to find the LSB of & is the bitwise AND operator 0x means the following numeric literal is in hexadecimal 01 is the hex value for a mask with just the LSB on So, it will zero-out all the bits of x except the LSB, which it will copy from x. Thus, the result will be just the LSB of x. I don't know if that's exactly what you were asking. And I really don't know what the VHDL would look like. I was kinda' being a smartass. ;)
VHDL is a Hardware description Laguage used to document and simulate digital circuits. I use the technique you mentioned above in Assembly language...
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