Question

Is it true that usually all popular and mostly used computer architectures has byte addressing? And does it mean that in 32-bit architectures 2 bits are used for this in address bus while in 64-bit architectures 3 bits are used for this in address bus?

Answer 1

Hows many bits 'wide' is a byte? Hint: It rhymes with "late".

Answer 2

1byte=8 bits
1 kb =1024 bytes
1 Mb=1024kbytes

Answer 3

i know how many bits has byte...

Answer 4

so does all popular and mostly used computer architectures usually have ability to adress data by 8 bits at a time?

Answer 5

no. i don't mean that.

I think you already the know the meaning of 32-bit and 64-bit .

Answer 6

most common architectures do support multiple bytes at a time

Answer 7

so 32 bit processor can access only 2^30=1GB of memory?

Answer 8

I think I misunderstood your question and your assumptions are reasonable...

But what do you mean by 2^30=1 GB memory in case of 32-bit?

Answer 9

I have 4GB memory in a x86 architecture.......

Answer 10

1GB=2^30
so if 2 bit are used for byte addressing (32 bits has 4 bytes) only 30 are left for address selection?

Answer 11

i don't know maybe x86 doesn't have byte addressing that's what for I am asking if all popular architectures has byte addressing

Answer 12

x86 has 16-bit , 32-bit or 64-bit architecture........so you mean all of them don't have byte addressing?

Answer 13

i don't know, i am asking someone lol

Answer 14

now i'm confused...what next?

Answer 15

so it means in address bus 2 bit are used for byte addressing (32 bits has 4 bytes) only 30 are left for address selection? so you can't have 4GB RAM.
But you have so where's my mistake?

Answer 16

Your first assumption seems true......but the second one is murky.

Answer 17

For example, a system with a 32-bit address bus can address 2^32 (4,294,967,296) memory locations. If each memory address holds one byte, the addressable memory space is 4 GB.

Answer 18

But take a note that not all of my RAM is used....my system shows 2.45GB usable......it should make your second assumption clear

Answer 19

it can be adressed only by 1 byte then?

Answer 20

Yes, it seems so.

Man I'm not an expert!! I'm also a student. Someone said right that little knowledge is dangerous. It applies to both of us.

Answer 21

ARM architecture produces byte addresses and has a 32-bit address space, which allows the addressing of 2^32 separate bytes. However as instructions and most data are 32-bits wide it is normal to read or write four bytes in parallel. We will therefore regard the ARM as having a 30-bit address space.

that's what's written in my notes but ARM is used only in phones so desktops/laptops use different architecture and it may have different rules

Answer 22

You should study something about multiplexed addresses. It should help.

Answer 23

we didn't have it in our course

Answer 24

Simply understand that 32 bit architectures use 32-bit address buses and that's why they have up to 4GB of addressable memory. Thus 32 bit can directly access 4GB of byte- addressable memory.

But also note that, the external address and data buses are often wider than 32 bits but both of these are stored and manipulated internally in the processor as 32-bit quantities. For example, the Pentium Pro processor is a 32-bit machine, but the external address bus is 36 bits wide, and the external data bus is 64 bits wide.

Answer 25

It is not necessary that there should be fixed amount of bit used for byte addressing.

Answer 26

ah so address buses are wider? in notes was written that it should be same size, but maybe it's just for simplicity

Answer 27

It is only important that in byte addressing "bytes" are used as units to access data. Compare: Word Addressable

Answer 28

The Pentium Pro distinction DBhatta mentions is called Physical Address Extensions, and allows a nominally 32-bit architecture to address more than 4GB of memory (typically 64GB). More at http://en.wikipedia.org/wiki/Physical_Address_Extensions

It's implemented at the Operating System level and based on the page table implementations that are already in place to allow addressing memory that isn't necessarily mapped to RAM.

Answer 29

but how it reaches those addresses who are bigger than 4GB if it has only 32 bits address bus? how those ones and zeros go?

Answer 30

@thomas: It is possible due to multiplexed addresses.

According to Wikipedia:
For example, a 16-bit address bus had 16 physical wires making up the bus. As the buses became wider, this approach became expensive in terms of the number of chip pins and board traces. Beginning with the Mostek 4096 DRAM, multiplexed addressing became common. In a multiplexed address scheme, the address is sent in two equal parts. This halves the number of address bus signals required to connect to the memory. For example a 32-bit address bus can be implemented by using 16 wires and sending the first half of the memory address, immediately followed by the second half.

Answer 31

Handling virtual memory, which is used for paging and generally running more stuff than can fit in RAM, requires some architecture support. A little bit more very similar support is used for addressing higher chunks of memory. In particular, the OS kernel can set an extra, independent set of bits to select between distinct 4GB blocks of real memory, and then the 32-bit address is calculated with respect to that offset.

Answer 32

Tomas, Its a bit of a corner case in the embedded world, but many Digital Signal Processors (still in wide use today) address words, not bytes. On those the C programming language "char" type is 16 bits wide.