Question

Pls help:)
Identify the following sequential circuits and draw their timing diagrams for the given input.

Answer 1

My answer is
it is synchronous(clocked) s-r latch

Answer 2

My answer is
it is a 5 bit serial-in paralle-out shift register.

Answer 3

looks good,

just a small thing i noticed in waveforms for first question :-
yes, its a clocked SR latch, which is LEVEL sensitive.
But, putting arrow MARKS on Clock waveform are hinting rising edge triggered operation.
So i guess if you remove the arrow marks, confusion wont be there :)

Answer 4

oh k. Thanx a lot:) I have one more. If u dnt mind can u pls check that too?

Answer 5

My answer is that it is a 3-bit up counter

Answer 6

All T flops,
Is the first flop input tied to 1 ?

Answer 7

ya

Answer 8

Also, Is the first flop output is taken as Q0 or Q2 ?
pic is not that clear..

Answer 9

sry. it is taken as Q0

Answer 10

Good, so LSB is always toggling

Answer 11

yup 3-bit up counter !

Answer 12

LSB?

Answer 13

Least Significant Biscuit :)

Answer 14

lol dont wry about it, its just means the units digit

Answer 15

lol k