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Computer Science 10 Online
OpenStudy (anonymous):

i read that ther's smthin called a scheduler that picks a process and gives it to the cpu for execution.....but scheduler is also a some code running? so who runs this scheduler thing? cpu? what if ther's a single processor ? how can cpu run two set of code at the same time?

OpenStudy (anonymous):

@ktobah @nick67

OpenStudy (nick67):

@A.Avinash_Goutham in the past I used homemade scheduler on microcontrollers, where many times there in no room for an operative system or a simple kernel, too. In that case I used a well known trick: you use an hardware interrupt from an internal clock in order to switch from one task to another. The single processor just jumps to an ISR (Interrupt Service Routine) where you save current task context (stopping it) and load next task context (running it), up to the next timer interrupt.

OpenStudy (anonymous):

like after a process completes execution.....it generates a system call and next one in ihe queue is loaded for execution....is it this way sir?

OpenStudy (nick67):

yes, Avinash, you're right. May I suggest you this reading: http://www.freertos.org/implementation/main.html It's an open source Real Time Operative System well documented and simple to use. I think it's useful for students, too.

OpenStudy (anonymous):

sir....what about modern operating systems? sm1 has to choose a process among several processes bases on priority?

OpenStudy (nick67):

On most systems there is a priority scheme for the scheduler, that allows each task to consume some of the CPU time

OpenStudy (nick67):

but, if there's any need, a task can also raise a flag (let's say an interrupt) to signal it has an urgent call to serve

OpenStudy (anonymous):

So ther's s no physical code that requires cpu attention all the time it is just a priority queue that deques it's elements regularly

OpenStudy (nick67):

one processor (single core) can execute one instruction each clock tick; the program counter tells it what is the next instruction, except that in hardware interrupts, that load the program counter with a preset address pointing to ISR

OpenStudy (anonymous):

oh ok i get it

OpenStudy (anonymous):

thank you sir! :)

OpenStudy (nick67):

you're welcome, but again I suggest you reading the Free RTOS docs

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