Question

I have a J-k flip flop. J=K= HIGH


What is the Q output?

Answer 1

@ganeshie8

Answer 2

output toggles :-
if previous value of output Q is 0, it becomes 1 now
if previous value of output Q is 1, it becomes 0 now

you can get this much by looking at JK flipflop transition table right... which part u have problem ?

Answer 3

bro I am trying to understand how to solve this one. http://screencast.com/t/ftrnYIYoj

I have the solution, I just dont understand the solution

Answer 4

OK.
First of all this is a sequential counter - all flops are clocked by same clock.

Answer 5

lets start with the LSB flop FF0 :
since we connect JK to HIGH always, its output toggles always.

Answer 6

ok

Answer 7

so J0 = 1 K0 = 1 Q0 = 0 ?

Answer 8

how u say that Q0 = 0 ?
lets reset the flops to an initial state of 0000
then we apply clock :-
1. first clock cycle, FF0 output toggles from 0 to 1

Answer 9

oh ok

Answer 10

first clock J1 = 1 K1 = 1 Q1= 1?

Answer 11

no, for FF1 :-
inputs to AND gate : Q0 = 0, Q3' = 1 ; so AND gate output = 0 ; so FF1 will stay 0.

Answer 12

but Q0 toggle didnt it toggle from 0 to 1?

Answer 13

for FF2 :-
inputs to AND gate : Q0 = 0, Q1 = 0 ; so AND gate output = 0 ; so FF2 will stay 0

Answer 14

i wil get to that wait a sec, lets complete first cycle for all flops. then il answer that q ok

Answer 15

for FF3 :- (Q3Q0 + Q0Q1Q2) , so it stays 0 as well

Answer 16

so after first clock cycle, we see : 0001

Answer 17

alright how about Q0

Answer 18

thats a really important and very fundamental question in sequential circuits. explanation follows -

Answer 19

here, all 4 flops are "positive edge triggered". what does that mean? it means, they capture data ONLY when clock is transitioning from LOW to HIGH.

Answer 20

and since clock is going to all flops at the same time, it will be transitioning from LOW to HIGH at the same time for all 4 flops. so the flops capture whatever the OLD data that exists at their input.

Answer 21

FF1 captures OLD Q0, which is 0. so FF1 wont toggle.
does that make sense

Answer 22

let me proccess

Answer 23

take ur time...

Answer 24

ok I got the first cycle

Answer 25

(yay!)

Answer 26

ok good. so at the end of first cycle, we have 0001 in our counter.

Answer 27

lets see second clock cycle :-
FF0 : JK is permanently connected to HIGH, s Q toggles from 1 to 0.

Answer 28

FF1 : AND gate inputs : Q0 = 1, Q3'=1, so AND gate's output is 1 ; FF1 toggles from 0 to 1.

Answer 29

FF2 : 0
FF3 : 0

so at the end of second cycle, our counter has : 0010

Answer 30

see if u get this second cycle also.. u can analyze rest of the cycles same way, using the present value in counter to figure out next value.

Answer 31

Thank you so much man, I was missing that fundamental thingy

Answer 32

great to hear.. yw !

Answer 33

Ok I solved it all! The only thing I dont understand is just this first line of the solution

Answer 34

Sorry I forgot to post the image http://screencast.com/t/c7AfoiSMwty9

Answer 35

In the 0th clock cycle, we reset the flops. here we are starting with an initial state of :
Q3Q2Q1Q0 = 0000

Answer 36

but why it doesnt even toggle

Answer 37

first line in that table shows the initial state of counter. resetting gives this initial state. resetting is required for ALL sequential circuits.

Answer 38

its like assuming that the previews one was 1111

Answer 39

good q. we dont apply clock during reset cycle. so flops will not capture data.

Answer 40

u can think of it like this :- every sequential circuit requires a reset to happen before its normal functionality starts. resetting flops keeps the circuit in known state. in our case, it makes our counter to start at 0000. once the clock keeps ticking, the flops start capturing their input data and the counter keeps on incrementing.