Question

Draw the logic circuit diagram for the following Boolean expression:
F(r, s, t)= [st1 (s1t)1]1 + r
[Hint: The circuit should include one AND gate, one NAND gate, one XNOR gate, one OR gate and two inverters. Draw all gates clearly]

Answer 1

Is it \( \boxed{ F(r, s, t) = \Big[ st' \cdot (s't)' \Big]' + r } \) ? (Where \('\) is NOT, multiplication is AND and addition is OR)
In that case it's weird because the circuit doesn't require all those gates...
Using de morgen rules:
$$ \boxed{(a \cdot b)' = a' + b'} \qquad \boxed{(a + b)' = a' \cdot b'} $$
we can simplify this (remembering that double negation \(''\) cancels)
$$
\begin{array}{ll}
F(r, s, t)
&= \Big[ st' \cdot (s't)' \Big]' + r \\
&= (st')' + (s't)'' +r \\
&= (st')' + s't +r \\
&= s' + t'' + s't +r \\
&= s' + t + s't +r \\
&= s' + t(1 + s') +r \\
&= s' + t + r \\
&= (s'' t')' +r = (st')' + r\\
\end{array}
$$As you can see we need only a NOT (an inverter), a NAND and an OR (which all are in the list) to build this.

Answer 2

Above the OR gate on the right I wrote \((st')' + r\) but for some reason it got deleted