Question

hello Sir i am Farrukh Reasearch scholar from India sir i am stucking in a problem regarding instrumentation amplifer my problem is........
I want to design Instrumentation Amplifer using two stage CMOS op -amp i have designed two stage CMOS Op amp in Tanner EDA which gives 75 dB gain with power consumption 300 uW my problem is that i want to connect them as 3 Op amp Instrumentation configuration but i dont know how to take the values of resistances that are used in 3 Op amp instrumentation amplifer such all the MOS transistors used are in Saturation

Answer 1

A schematic would help, I really can't understand what your asking. Never mind past experience just give circuit description and problem you having.

Answer 2

how to calculate the value of the resistances which i have shown in schematic

Answer 3

schematic of two stage CMOS Op amp which are in Instrumentation Amplifier

Answer 4

The twostageopamp is a typical differential input stage fed by a current source with a active load. Other characteristic would depend of CMOS technology used, but generally limits of feedback components are given by manufacturer.
The last stage of the instrumentationopamp is a differential amplifier using 10 K input and 10 K feedback. Choice of value may depend on twostageopamp but I rather think it has to do with accuracy. You see certain values available with high accuracy as up to +- .005 %.
The input stages are also used as a differential amplifier but I think its main purpose is to isolate the input from the input 10 K resistance. The choice of 50 K and 100 ohm I'm not sure and one may need to do more analysis of the twostageopamp.